Two prevalent approaches for building complex custom semiconductor devices are based on field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC).
A FPGA is a semiconductor device that can be configured by the customer or designer after manufacturing, using a logic circuit diagram or a source code in a hardware description language (HDL) describing how the chip functions. FPGAs contain programmable logic components (logic blocks), and a hierarchy of reconfigurable interconnects that allow the blocks to be wired together. Logic blocks can be configured to perform complex combinational functions as well as simple logic gates through combinational logic and/or lookup table(s). In FPGAs, the logic blocks may include memory elements in form of simple flip-flops or even more complete blocks of memory.
An ASIC is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. The complexity/functionality of ASIC has grown significantly. Typically, an ASIC may contain few hundred to over 100 million gates. A System-on-a-chip (SoC) type ASICs may include processors, memory blocks (e.g., ROM, RAM, and Flash) and other large building blocks. An HDL, such as Verilog or VHDL, is used to describe the functionality of ASICs during the design phase. There have been several approaches to design and implement ASIC devices, such as gate array (requiring customization at the metallization layers), standard cell, full custom design, and structured/platform design. In structured ASIC approach, the ASIC vendor typically predefines the logic mask-layers of a device; however, the customization is done by creating custom metal layers to create custom connections between predefined lower-layer logic elements. Structured ASIC approach fits between FPGAs and Standard-Cell ASIC designs. Because only a small number of chip layers must be custom-produced, “structured ASIC” designs have much smaller non-recurring expenditures (NRE) than “standard-cell” or “full-custom” chips, which require that a full mask set be produced for every design.
An advantage of FPGA over ASIC is that FPGA can be used to implement any logical function that an ASIC could perform, but offers the ability to reconfigure the logic during the development phase as well as update the functionality after shipping without altering the physical construction of the device. However, the tradeoff is the larger die size, more power consumption, less performance, and higher per die cost (not including NRE).
FPGAs are the modern-day technology for building a breadboard or prototype from standard parts; programmable logic blocks and programmable interconnects allow the same FPGA to be used in many different applications. For smaller designs and/or lower production volumes, FPGAs may be more cost effective than an ASIC design even in production. The non-recurring engineering cost and implementation of an ASIC can run into the millions of dollars.
The many programmable interconnects and associated storage elements in FPGA reside on the same die as its logical blocks require large die size and high power consumption, making FPGA not a viable option for production for certain applications requiring low power consumption or low cost per die.